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INTEGRATED CIRCUITS
DATA SHEET
TDA1541 Dual 16-bit DAC
Product specification File under Integrated Circuits, IC01 November 1985
Philips Semiconductors
Product specification
Dual 16-bit DAC
GENERAL DESCRIPTION
TDA1541
The TDA1541 is a monolithic integrated dual 16-bit digital-to-analogue converter (DAC) designed for use in hi-fi digital audio equipment such as Compact Disc players, digital tape or cassette recorders. Features * Selectable two-channel input format: offset binary or two's complement * Internal timing and control circuit * TTL compatible digital inputs * High maximum input bit-rate and fast settling time. QUICK REFERENCE DATA Supply voltages pin 28 pin 26 pin 15 Supply currents pin 28 pin 26 pin 15 Signal-to-noise ratio (full scale sine-wave) at analogue outputs (AOL; AOR) Non-linearity at Tamb = -20 to +70 C Current settling time to 1 LSB Maximum input bit rate at data input (pin 3) Maximum clock frequency at clock input (pin 2) at clock input (pin 4) Full scale temperature coefficient at analogue outputs (AOL; AOR) Operating ambient temperature range Total power dissipation PACKAGE OUTLINE 28-lead DIL; plastic (with internal heat spreader) (SOT-117); SOT117-1; 1996 August 14. TCFS Tamb Ptot typ. typ. 200 x 10-6 -20 to +70 850 K-1 C mW fBCKmax fSCKmax min. min. 6 12 MHz MHz BRmax min. 6 Mbits/s tcs typ. typ.
1 2
VDD VDD1 VDD2 IDD IDD1 IDD2
typ. typ. typ. typ. typ. typ.
5 -5 -15 45 45 25
V V V mA mA mA
S/N
typ.
95
dB LSB s
1
November 1985
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Philips Semiconductors
Product specification
Dual 16-bit DAC
TDA1541
November 1985
3
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Dual 16-bit DAC
PINNING 1 2 3 LE/WS* BCK* DATA L/DATA* latch enable input word select input bit clock input data left channel input data input (selected format) data right channel input system clock input analogue ground right channel output
TDA1541
4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
DATA R/SYS* GND (A) AOR DECOU DECOU DECOU DECOU DECOU DECOU DECOU GND (D) VDD2 n.c. n.c. DECOU DECOU DECOU DECOU DECOU DECOU DECOU AOL VDD1 OB/TWC* VDD
decoupling
digital ground -15 V supply voltage not connected Fig.2 Pinning diagram.
decoupling
left channel output -5 V supply voltage mode selection input +5 V supply voltage
* See Table 1 data selection input.
November 1985
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Philips Semiconductors
Product specification
Dual 16-bit DAC
FUNCTIONAL DESCRIPTION
TDA1541
The TDA1541 accepts input sample formats in time multiplexed mode or simultaneous mode with any bit length. The most significant bit (MSB) must always be first. This flexible input data format allows easy interfacing with signal processing chips such as interpolation filters, error correction circuits, pulse code modulation adaptors and audio signal processors (ASP). The high maximum input bit-rate and fast settling time facilitates application in 4 x oversampling systems (44,1 kHz to 176,4 kHz) with the associated simple analogue filtering function (low order, linear phase filter). Input data selection (see also Table 1) With input OB/TWC connected to ground, data input (offset binary format) must be in time multiplexed mode. It is accompanied with a word select (WS) and a bit clock input (BCK) signal. A separate system clock input (SCK) is provided for accurate, jitter-free timing of the analogue outputs AOL and AOR. With OB/TWC connected to VDD the mode is the same but data format must be in two's complement. When input OB/TWC is connected to (VDD1) the two channels of data (L/R) are input simultaneously via (DATA L) and (DATA R), accompanied with BCK and a latch-enable input (LE). With this mode selected the data must be in offset binary. The format of data input signals is shown in figures 3, 4 and 5. True 16-bit performance is achieved by each channel using three 2-bit active dividers, operating on the dynamic element matching principle, in combination with a 10-bit passive current-divider, based on emitter scaling. All digital inputs are TTL compatible. Input data selection OB/TWC -5 V 0V +5 V simultaneous time MUX OB time MUX TWC MODE LE WS WS PIN 1 PIN 2 BCK BCK BCK PIN 3 DATA L DATA OB DATA TWC PIN 4 DATA R SCK SCK
Where: LE WS BCK DATA L DATA R DATA OB DATA TWC MUX OB MUX TWC = latch enable = word select = bit clock = data left = data right = data offset binary = data two's complement = multiplexed offset binary = multiplexed two's complement
November 1985
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Philips Semiconductors
Product specification
Dual 16-bit DAC
RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Supply voltage ranges pin 28 pin 26 pin 15 Crystal temperature range Storage temperature range Operating ambient temperature range Electrostatic Note 1. Discharging a 250 pF capacitor through a 1 k series resistor. THERMAL RESISTANCE From junction to ambient Rth
j-a
TDA1541
VDD VDD1 VDD2 TXTAL Tstg Tamb Ves
0 to +7 0 to -7 0 to -17 -55 to +150 -55 to +150 -20 to +70 -1000 to +1000
V V V C C C V
handling(1)
=
35
K/W
November 1985
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Philips Semiconductors
Product specification
Dual 16-bit DAC
TDA1541
CHARACTERISTICS VDD = + 5 V; VDD1 = -5 V; VDD2 = -12 V; Tamb = + 25 C; measured in Fig. 1; unless otherwise specified. PARAMETER Supply Supply voltage ranges pin 28 pin 26 pin 15 Supply currents pin 28 pin 26 pin 15 Resolution Inputs Input current (pin 3 and pin 4) digital inputs LOW (< 0,8 V) digital inputs HIGH (> 2,0 V) Input frequency at clock input (pin 4) at clock input (pin 2) at data inputs (pin 3 and pin 4) at word select input (pin 1) Input capacitance of digital inputs Oscillator Oscillator frequency with internal capacitor Analogue outputs (AOL; AOR) Output voltage compliance Full scale current Zero scale current Full scale temperature coefficient Tamb = -20 to +70 C Linearity error integral at Tamb = 25 C at Tamb = -20 to +70 C Linearity error differential at Tamb = 25 C at Tamb = -20 to +70 C Ed1 Ed1 - - 0,5 tbf 1 - LSB LSB E1 E1 - - 0,5 tbf - - LSB LSB TCFS - 200 x 10-6 - K-1 VOC IFS IZS tbf 3,4 - - 4,0 tbf tbf 4,6 - mV mA nA fosc 150 200 250 kHz fSCK fBCK fDAT fWS CI - - - - - - - - - 12 12 6 6 200 - MHz MHz MHz kHz pF IIL IIH - - - - tbf tbf mA A IDD -IDDI -IDD2 Res - - - - 45 45 25 16 tbf tbf tbf - mA mA mA bits VDD -VDD1 -VDD2 4,0 4,5 14 5,0 5,0 15 6,0 6,0 16 V V V SYMBOL MIN. TYP. MAX. UNIT
November 1985
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Philips Semiconductors
Product specification
Dual 16-bit DAC
TDA1541
PARAMETER Signal -to-noise ratio + THD* Settling time to 1 LSB Channel separation Unbalance between outputs Time delay between outputs Power supply ripple rejection** VDD = +5 V VDD1 = -5 V VDD2 = -15 V Signal-to-noise ratio at bipolar zero Timing (see Figs 3, 4 and 5) Rise time Fall time Bit clock cycle time Bit clock HIGH time Bit clock LOW time Bit clock fall time to latch rise time Bit clock rise time to latch fall time Data set-up time to bit clock Data hold time to bit clock Data set-up time to system clock Word select hold time to system clock Word select set-up time to system clock Bit clock fall time to system clock rise time System clock rise time to bit clock fall time System clock fall time to bit clock rise time Bit clock rise time to system clock fall time Latch enable LOW time Latch enable HIGH time tr tf tcs
SYMBOL S/N 90 - 80 - - - - - - - - 160 48 48 0 0 32 0 32 0 32 32 32 50 0 20 32
MIN. 95 1 tbf 0,1 - tbf tbf tbf
TYP. - - - 0,2 1 - - - -
MAX. dB s dB dB s dB dB dB dB
UNIT
IFS td RR RR RR S/N
-100 - - - - - - - - - - - - - - - - - -
35 35 - - - - - - - - - - - - - - - -
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
tCY tHB tLB tFBRL tRBFL tSDB tHDB tSDS tHWS tSWS tFBRS tRSFB tFSRB tRBFS tLLE tHLE
* Signal-to-noise ratio + THD with 1 kHz full scale sinewave generated at a sampling rate of 176,4 kHz. ** Vripple = 1% of supply voltage and fripple = 100 Hz.
November 1985
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Philips Semiconductors
Product specification
Dual 16-bit DAC
TDA1541
Fig.3 Format of input signals; time multiplexed at fSCK = fBCK (I2S format).
Fig.4 Format of input signals; time multiplexed at fSCK = 2 x fBCK.
November 1985
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Philips Semiconductors
Product specification
Dual 16-bit DAC
TDA1541
Fig.5 Format of input signals; simultaneous data.
November 1985
10
Philips Semiconductors
Product specification
Dual 16-bit DAC
PACKAGE OUTLINE
handbook, plastic dual in-line package; 28 leads (600 mil) DIP28: full pagewidth
TDA1541
SOT117-1
seating plane
D
ME
A2
A
L
A1 c Z e b1 b 28 15 MH wM (e 1)
pin 1 index E
1
14
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 5.1 0.20 A1 min. 0.51 0.020 A2 max. 4.0 0.16 b 1.7 1.3 0.066 0.051 b1 0.53 0.38 0.020 0.014 c 0.32 0.23 0.013 0.009 D (1) 36.0 35.0 1.41 1.34 E (1) 14.1 13.7 0.56 0.54 e 2.54 0.10 e1 15.24 0.60 L 3.9 3.4 0.15 0.13 ME 15.80 15.24 0.62 0.60 MH 17.15 15.90 0.68 0.63 w 0.25 0.01 Z (1) max. 1.7 0.067
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT117-1 REFERENCES IEC 051G05 JEDEC MO-015AH EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-14
November 1985
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Philips Semiconductors
Product specification
Dual 16-bit DAC
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TDA1541
The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
November 1985
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